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package org.graalvm.compiler.lir.amd64;
import static jdk.vm.ci.code.ValueUtil.asRegister;
import static org.graalvm.compiler.asm.amd64.AMD64Assembler.AMD64BinaryArithmetic.XOR;
import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.REG;
import org.graalvm.compiler.asm.amd64.AMD64Assembler.AMD64RMOp;
import org.graalvm.compiler.asm.amd64.AMD64BaseAssembler.OperandSize;
import org.graalvm.compiler.asm.amd64.AMD64MacroAssembler;
import org.graalvm.compiler.lir.LIRInstructionClass;
import org.graalvm.compiler.lir.Opcode;
import org.graalvm.compiler.lir.asm.CompilationResultBuilder;
import jdk.vm.ci.meta.AllocatableValue;
public class AMD64ClearRegisterOp extends AMD64LIRInstruction {
public static final LIRInstructionClass<AMD64ClearRegisterOp> TYPE = LIRInstructionClass.create(AMD64ClearRegisterOp.class);
@Opcode private final AMD64RMOp op;
private final OperandSize size;
@Def({REG}) protected AllocatableValue result;
public AMD64ClearRegisterOp(OperandSize size, AllocatableValue result) {
super(TYPE);
this.op = XOR.getRMOpcode(size);
this.size = size;
this.result = result;
}
@Override
public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
op.emit(masm, size, asRegister(result), asRegister(result));
}
}