public final class org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp extends org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexRVMOp implements org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexRRIOp
minor version: 0
major version: 59
flags: flags: (0x0031) ACC_PUBLIC, ACC_FINAL, ACC_SUPER
this_class: org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp
super_class: org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexRVMOp
{
public static final org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp VPSRLW;
descriptor: Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
flags: (0x0019) ACC_PUBLIC, ACC_STATIC, ACC_FINAL
public static final org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp VPSRLD;
descriptor: Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
flags: (0x0019) ACC_PUBLIC, ACC_STATIC, ACC_FINAL
public static final org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp VPSRLQ;
descriptor: Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
flags: (0x0019) ACC_PUBLIC, ACC_STATIC, ACC_FINAL
public static final org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp VPSRAW;
descriptor: Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
flags: (0x0019) ACC_PUBLIC, ACC_STATIC, ACC_FINAL
public static final org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp VPSRAD;
descriptor: Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
flags: (0x0019) ACC_PUBLIC, ACC_STATIC, ACC_FINAL
public static final org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp VPSLLW;
descriptor: Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
flags: (0x0019) ACC_PUBLIC, ACC_STATIC, ACC_FINAL
public static final org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp VPSLLD;
descriptor: Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
flags: (0x0019) ACC_PUBLIC, ACC_STATIC, ACC_FINAL
public static final org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp VPSLLQ;
descriptor: Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
flags: (0x0019) ACC_PUBLIC, ACC_STATIC, ACC_FINAL
private final int immOp;
descriptor: I
flags: (0x0012) ACC_PRIVATE, ACC_FINAL
private final int r;
descriptor: I
flags: (0x0012) ACC_PRIVATE, ACC_FINAL
static final boolean $assertionsDisabled;
descriptor: Z
flags: (0x1018) ACC_STATIC, ACC_FINAL, ACC_SYNTHETIC
static void <clinit>();
descriptor: ()V
flags: (0x0008) ACC_STATIC
Code:
stack=9, locals=0, args_size=0
0: ldc Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler;
invokevirtual java.lang.Class.desiredAssertionStatus:()Z
ifne 1
iconst_1
goto 2
StackMap locals:
StackMap stack:
1: iconst_0
StackMap locals:
StackMap stack: int
2: putstatic org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.$assertionsDisabled:Z
3: new org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp
dup
ldc "VPSRLW"
iconst_1
iconst_1
iconst_0
sipush 209
bipush 113
iconst_2
invokespecial org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.<init>:(Ljava/lang/String;IIIIII)V
putstatic org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.VPSRLW:Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
4: new org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp
dup
ldc "VPSRLD"
iconst_1
iconst_1
iconst_0
sipush 210
bipush 114
iconst_2
invokespecial org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.<init>:(Ljava/lang/String;IIIIII)V
putstatic org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.VPSRLD:Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
5: new org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp
dup
ldc "VPSRLQ"
iconst_1
iconst_1
iconst_0
sipush 211
bipush 115
iconst_2
invokespecial org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.<init>:(Ljava/lang/String;IIIIII)V
putstatic org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.VPSRLQ:Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
6: new org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp
dup
ldc "VPSRAW"
iconst_1
iconst_1
iconst_0
sipush 225
bipush 113
iconst_4
invokespecial org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.<init>:(Ljava/lang/String;IIIIII)V
putstatic org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.VPSRAW:Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
7: new org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp
dup
ldc "VPSRAD"
iconst_1
iconst_1
iconst_0
sipush 226
bipush 114
iconst_4
invokespecial org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.<init>:(Ljava/lang/String;IIIIII)V
putstatic org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.VPSRAD:Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
8: new org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp
dup
ldc "VPSLLW"
iconst_1
iconst_1
iconst_0
sipush 241
bipush 113
bipush 6
invokespecial org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.<init>:(Ljava/lang/String;IIIIII)V
putstatic org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.VPSLLW:Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
9: new org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp
dup
ldc "VPSLLD"
iconst_1
iconst_1
iconst_0
sipush 242
bipush 114
bipush 6
invokespecial org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.<init>:(Ljava/lang/String;IIIIII)V
putstatic org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.VPSLLD:Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
10: new org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp
dup
ldc "VPSLLQ"
iconst_1
iconst_1
iconst_0
sipush 243
bipush 115
bipush 6
invokespecial org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.<init>:(Ljava/lang/String;IIIIII)V
putstatic org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.VPSLLQ:Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
return
LocalVariableTable:
Start End Slot Name Signature
private void <init>(java.lang.String, int, int, int, int, int, int);
descriptor: (Ljava/lang/String;IIIIII)V
flags: (0x0002) ACC_PRIVATE
Code:
stack=7, locals=8, args_size=8
start local 0 start local 1 start local 2 start local 3 start local 4 start local 5 start local 6 start local 7 0: aload 0
aload 1
iload 2
iload 3
iload 4
iload 5
getstatic org.graalvm.compiler.asm.amd64.AMD64VectorAssembler.AVX1_2:Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$OpAssertion;
invokespecial org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexRVMOp.<init>:(Ljava/lang/String;IIIILorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$OpAssertion;)V
1: aload 0
iload 6
putfield org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.immOp:I
2: aload 0
iload 7
putfield org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.r:I
3: return
end local 7 end local 6 end local 5 end local 4 end local 3 end local 2 end local 1 end local 0 LocalVariableTable:
Start End Slot Name Signature
0 4 0 this Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
0 4 1 opcode Ljava/lang/String;
0 4 2 pp I
0 4 3 mmmmm I
0 4 4 w I
0 4 5 op I
0 4 6 immOp I
0 4 7 r I
MethodParameters:
Name Flags
opcode
pp
mmmmm
w
op
immOp
r
public void emit(org.graalvm.compiler.asm.amd64.AMD64VectorAssembler, org.graalvm.compiler.asm.amd64.AVXKind$AVXSize, jdk.vm.ci.code.Register, jdk.vm.ci.code.Register, int);
descriptor: (Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler;Lorg/graalvm/compiler/asm/amd64/AVXKind$AVXSize;Ljdk/vm/ci/code/Register;Ljdk/vm/ci/code/Register;I)V
flags: (0x0001) ACC_PUBLIC
Code:
stack=9, locals=6, args_size=6
start local 0 start local 1 start local 2 start local 3 start local 4 start local 5 0: getstatic org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.$assertionsDisabled:Z
ifne 1
aload 0
getfield org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.assertion:Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$OpAssertion;
aload 1
getfield org.graalvm.compiler.asm.amd64.AMD64VectorAssembler.target:Ljdk/vm/ci/code/TargetDescription;
getfield jdk.vm.ci.code.TargetDescription.arch:Ljdk/vm/ci/code/Architecture;
checkcast jdk.vm.ci.amd64.AMD64
aload 2
aconst_null
aload 3
aload 4
invokevirtual org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$OpAssertion.check:(Ljdk/vm/ci/amd64/AMD64;Lorg/graalvm/compiler/asm/amd64/AVXKind$AVXSize;Ljdk/vm/ci/code/Register;Ljdk/vm/ci/code/Register;Ljdk/vm/ci/code/Register;)Z
ifne 1
new java.lang.AssertionError
dup
invokespecial java.lang.AssertionError.<init>:()V
athrow
1: StackMap locals:
StackMap stack:
aload 1
aload 2
invokestatic org.graalvm.compiler.asm.amd64.AMD64VectorAssembler.getLFlag:(Lorg/graalvm/compiler/asm/amd64/AVXKind$AVXSize;)I
aload 0
getfield org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.pp:I
aload 0
getfield org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.mmmmm:I
aload 0
getfield org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.w:I
aload 0
getfield org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.immOp:I
aload 0
getfield org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp.r:I
aload 3
aload 4
invokevirtual org.graalvm.compiler.asm.amd64.AMD64VectorAssembler.emitVexOp:(IIIIIILjdk/vm/ci/code/Register;Ljdk/vm/ci/code/Register;)V
2: aload 1
iload 5
invokevirtual org.graalvm.compiler.asm.amd64.AMD64VectorAssembler.emitByte:(I)V
3: return
end local 5 end local 4 end local 3 end local 2 end local 1 end local 0 LocalVariableTable:
Start End Slot Name Signature
0 4 0 this Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler$VexShiftOp;
0 4 1 asm Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler;
0 4 2 size Lorg/graalvm/compiler/asm/amd64/AVXKind$AVXSize;
0 4 3 dst Ljdk/vm/ci/code/Register;
0 4 4 src Ljdk/vm/ci/code/Register;
0 4 5 imm8 I
MethodParameters:
Name Flags
asm
size
dst
src
imm8
public java.lang.String toString();
descriptor: ()Ljava/lang/String;
flags: (0x1041) ACC_PUBLIC, ACC_BRIDGE, ACC_SYNTHETIC
Code:
stack=1, locals=1, args_size=1
0: aload 0
invokespecial org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexRVMOp.toString:()Ljava/lang/String;
areturn
LocalVariableTable:
Start End Slot Name Signature
public boolean isSupported(org.graalvm.compiler.asm.amd64.AMD64VectorAssembler, jdk.vm.ci.amd64.AMD64Kind);
descriptor: (Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler;Ljdk/vm/ci/amd64/AMD64Kind;)Z
flags: (0x1041) ACC_PUBLIC, ACC_BRIDGE, ACC_SYNTHETIC
Code:
stack=3, locals=3, args_size=3
0: aload 0
aload 1
aload 2
invokespecial org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexRVMOp.isSupported:(Lorg/graalvm/compiler/asm/amd64/AMD64VectorAssembler;Ljdk/vm/ci/amd64/AMD64Kind;)Z
ireturn
LocalVariableTable:
Start End Slot Name Signature
}
SourceFile: "AMD64VectorAssembler.java"
NestHost: org.graalvm.compiler.asm.amd64.AMD64VectorAssembler
InnerClasses:
private final OpAssertion = org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$OpAssertion of org.graalvm.compiler.asm.amd64.AMD64VectorAssembler
public abstract VexRRIOp = org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexRRIOp of org.graalvm.compiler.asm.amd64.AMD64VectorAssembler
public VexRVMOp = org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexRVMOp of org.graalvm.compiler.asm.amd64.AMD64VectorAssembler
public final VexShiftOp = org.graalvm.compiler.asm.amd64.AMD64VectorAssembler$VexShiftOp of org.graalvm.compiler.asm.amd64.AMD64VectorAssembler
public final AVXSize = org.graalvm.compiler.asm.amd64.AVXKind$AVXSize of org.graalvm.compiler.asm.amd64.AVXKind