public class org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp extends org.graalvm.compiler.lir.amd64.AMD64LIRInstruction
  minor version: 0
  major version: 59
  flags: flags: (0x0021) ACC_PUBLIC, ACC_SUPER
  this_class: org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp
  super_class: org.graalvm.compiler.lir.amd64.AMD64LIRInstruction
{
  public static final org.graalvm.compiler.lir.LIRInstructionClass<org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp> TYPE;
    descriptor: Lorg/graalvm/compiler/lir/LIRInstructionClass;
    flags: (0x0019) ACC_PUBLIC, ACC_STATIC, ACC_FINAL
    Signature: Lorg/graalvm/compiler/lir/LIRInstructionClass<Lorg/graalvm/compiler/lir/amd64/vector/AMD64VectorShuffle$ShuffleWordOp;>;

  private final org.graalvm.compiler.asm.amd64.AMD64Assembler$VexRMIOp op;
    descriptor: Lorg/graalvm/compiler/asm/amd64/AMD64Assembler$VexRMIOp;
    flags: (0x0012) ACC_PRIVATE, ACC_FINAL

  protected jdk.vm.ci.meta.AllocatableValue result;
    descriptor: Ljdk/vm/ci/meta/AllocatableValue;
    flags: (0x0004) ACC_PROTECTED
    RuntimeVisibleAnnotations: 
      org.graalvm.compiler.lir.LIRInstruction$Def(value = {org.graalvm.compiler.lir.LIRInstruction$OperandFlag.REG:Lorg/graalvm/compiler/lir/LIRInstruction$OperandFlag;})

  protected jdk.vm.ci.meta.AllocatableValue source;
    descriptor: Ljdk/vm/ci/meta/AllocatableValue;
    flags: (0x0004) ACC_PROTECTED
    RuntimeVisibleAnnotations: 
      org.graalvm.compiler.lir.LIRInstruction$Use(value = {org.graalvm.compiler.lir.LIRInstruction$OperandFlag.REG:Lorg/graalvm/compiler/lir/LIRInstruction$OperandFlag;, org.graalvm.compiler.lir.LIRInstruction$OperandFlag.STACK:Lorg/graalvm/compiler/lir/LIRInstruction$OperandFlag;})

  private final int selector;
    descriptor: I
    flags: (0x0012) ACC_PRIVATE, ACC_FINAL

  static void <clinit>();
    descriptor: ()V
    flags: (0x0008) ACC_STATIC
    Code:
      stack=1, locals=0, args_size=0
         0: .line 160
            ldc Lorg/graalvm/compiler/lir/amd64/vector/AMD64VectorShuffle$ShuffleWordOp;
            invokestatic org.graalvm.compiler.lir.LIRInstructionClass.create:(Ljava/lang/Class;)Lorg/graalvm/compiler/lir/LIRInstructionClass;
            putstatic org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.TYPE:Lorg/graalvm/compiler/lir/LIRInstructionClass;
            return
      LocalVariableTable:
        Start  End  Slot  Name  Signature

  public void <init>(org.graalvm.compiler.asm.amd64.AMD64Assembler$VexRMIOp, jdk.vm.ci.meta.AllocatableValue, jdk.vm.ci.meta.AllocatableValue, int);
    descriptor: (Lorg/graalvm/compiler/asm/amd64/AMD64Assembler$VexRMIOp;Ljdk/vm/ci/meta/AllocatableValue;Ljdk/vm/ci/meta/AllocatableValue;I)V
    flags: (0x0001) ACC_PUBLIC
    Code:
      stack=2, locals=5, args_size=5
        start local 0 // org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp this
        start local 1 // org.graalvm.compiler.asm.amd64.AMD64Assembler$VexRMIOp op
        start local 2 // jdk.vm.ci.meta.AllocatableValue result
        start local 3 // jdk.vm.ci.meta.AllocatableValue source
        start local 4 // int selector
         0: .line 167
            aload 0 /* this */
            getstatic org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.TYPE:Lorg/graalvm/compiler/lir/LIRInstructionClass;
            invokespecial org.graalvm.compiler.lir.amd64.AMD64LIRInstruction.<init>:(Lorg/graalvm/compiler/lir/LIRInstructionClass;)V
         1: .line 168
            aload 0 /* this */
            aload 1 /* op */
            putfield org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.op:Lorg/graalvm/compiler/asm/amd64/AMD64Assembler$VexRMIOp;
         2: .line 169
            aload 0 /* this */
            aload 2 /* result */
            putfield org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.result:Ljdk/vm/ci/meta/AllocatableValue;
         3: .line 170
            aload 0 /* this */
            aload 3 /* source */
            putfield org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.source:Ljdk/vm/ci/meta/AllocatableValue;
         4: .line 171
            aload 0 /* this */
            iload 4 /* selector */
            putfield org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.selector:I
         5: .line 172
            return
        end local 4 // int selector
        end local 3 // jdk.vm.ci.meta.AllocatableValue source
        end local 2 // jdk.vm.ci.meta.AllocatableValue result
        end local 1 // org.graalvm.compiler.asm.amd64.AMD64Assembler$VexRMIOp op
        end local 0 // org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp this
      LocalVariableTable:
        Start  End  Slot      Name  Signature
            0    6     0      this  Lorg/graalvm/compiler/lir/amd64/vector/AMD64VectorShuffle$ShuffleWordOp;
            0    6     1        op  Lorg/graalvm/compiler/asm/amd64/AMD64Assembler$VexRMIOp;
            0    6     2    result  Ljdk/vm/ci/meta/AllocatableValue;
            0    6     3    source  Ljdk/vm/ci/meta/AllocatableValue;
            0    6     4  selector  I
    MethodParameters:
          Name  Flags
      op        
      result    
      source    
      selector  

  public void emitCode(org.graalvm.compiler.lir.asm.CompilationResultBuilder, org.graalvm.compiler.asm.amd64.AMD64MacroAssembler);
    descriptor: (Lorg/graalvm/compiler/lir/asm/CompilationResultBuilder;Lorg/graalvm/compiler/asm/amd64/AMD64MacroAssembler;)V
    flags: (0x0001) ACC_PUBLIC
    Code:
      stack=6, locals=4, args_size=3
        start local 0 // org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp this
        start local 1 // org.graalvm.compiler.lir.asm.CompilationResultBuilder crb
        start local 2 // org.graalvm.compiler.asm.amd64.AMD64MacroAssembler masm
         0: .line 176
            aload 0 /* this */
            getfield org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.source:Ljdk/vm/ci/meta/AllocatableValue;
            invokevirtual jdk.vm.ci.meta.AllocatableValue.getPlatformKind:()Ljdk/vm/ci/meta/PlatformKind;
            checkcast jdk.vm.ci.amd64.AMD64Kind
            astore 3 /* kind */
        start local 3 // jdk.vm.ci.amd64.AMD64Kind kind
         1: .line 177
            aload 0 /* this */
            getfield org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.source:Ljdk/vm/ci/meta/AllocatableValue;
            invokestatic jdk.vm.ci.code.ValueUtil.isRegister:(Ljdk/vm/ci/meta/Value;)Z
            ifeq 4
         2: .line 178
            aload 0 /* this */
            getfield org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.op:Lorg/graalvm/compiler/asm/amd64/AMD64Assembler$VexRMIOp;
            aload 2 /* masm */
            aload 3 /* kind */
            invokestatic org.graalvm.compiler.asm.amd64.AVXKind.getRegisterSize:(Ljdk/vm/ci/amd64/AMD64Kind;)Lorg/graalvm/compiler/asm/amd64/AVXKind$AVXSize;
            aload 0 /* this */
            getfield org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.result:Ljdk/vm/ci/meta/AllocatableValue;
            invokestatic jdk.vm.ci.code.ValueUtil.asRegister:(Ljdk/vm/ci/meta/Value;)Ljdk/vm/ci/code/Register;
            aload 0 /* this */
            getfield org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.source:Ljdk/vm/ci/meta/AllocatableValue;
            invokestatic jdk.vm.ci.code.ValueUtil.asRegister:(Ljdk/vm/ci/meta/Value;)Ljdk/vm/ci/code/Register;
            aload 0 /* this */
            getfield org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.selector:I
            invokevirtual org.graalvm.compiler.asm.amd64.AMD64Assembler$VexRMIOp.emit:(Lorg/graalvm/compiler/asm/amd64/AMD64Assembler;Lorg/graalvm/compiler/asm/amd64/AVXKind$AVXSize;Ljdk/vm/ci/code/Register;Ljdk/vm/ci/code/Register;I)V
         3: .line 179
            goto 5
         4: .line 180
      StackMap locals: jdk.vm.ci.amd64.AMD64Kind
      StackMap stack:
            aload 0 /* this */
            getfield org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.op:Lorg/graalvm/compiler/asm/amd64/AMD64Assembler$VexRMIOp;
            aload 2 /* masm */
            aload 3 /* kind */
            invokestatic org.graalvm.compiler.asm.amd64.AVXKind.getRegisterSize:(Ljdk/vm/ci/amd64/AMD64Kind;)Lorg/graalvm/compiler/asm/amd64/AVXKind$AVXSize;
            aload 0 /* this */
            getfield org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.result:Ljdk/vm/ci/meta/AllocatableValue;
            invokestatic jdk.vm.ci.code.ValueUtil.asRegister:(Ljdk/vm/ci/meta/Value;)Ljdk/vm/ci/code/Register;
            aload 1 /* crb */
            aload 0 /* this */
            getfield org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.source:Ljdk/vm/ci/meta/AllocatableValue;
            invokevirtual org.graalvm.compiler.lir.asm.CompilationResultBuilder.asAddress:(Ljdk/vm/ci/meta/Value;)Lorg/graalvm/compiler/asm/AbstractAddress;
            checkcast org.graalvm.compiler.asm.amd64.AMD64Address
            aload 0 /* this */
            getfield org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp.selector:I
            invokevirtual org.graalvm.compiler.asm.amd64.AMD64Assembler$VexRMIOp.emit:(Lorg/graalvm/compiler/asm/amd64/AMD64Assembler;Lorg/graalvm/compiler/asm/amd64/AVXKind$AVXSize;Ljdk/vm/ci/code/Register;Lorg/graalvm/compiler/asm/amd64/AMD64Address;I)V
         5: .line 182
      StackMap locals:
      StackMap stack:
            return
        end local 3 // jdk.vm.ci.amd64.AMD64Kind kind
        end local 2 // org.graalvm.compiler.asm.amd64.AMD64MacroAssembler masm
        end local 1 // org.graalvm.compiler.lir.asm.CompilationResultBuilder crb
        end local 0 // org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp this
      LocalVariableTable:
        Start  End  Slot  Name  Signature
            0    6     0  this  Lorg/graalvm/compiler/lir/amd64/vector/AMD64VectorShuffle$ShuffleWordOp;
            0    6     1   crb  Lorg/graalvm/compiler/lir/asm/CompilationResultBuilder;
            0    6     2  masm  Lorg/graalvm/compiler/asm/amd64/AMD64MacroAssembler;
            1    6     3  kind  Ljdk/vm/ci/amd64/AMD64Kind;
    MethodParameters:
      Name  Flags
      crb   
      masm  
}
SourceFile: "AMD64VectorShuffle.java"
NestHost: org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle
InnerClasses:
  public final VexRMIOp = org.graalvm.compiler.asm.amd64.AMD64Assembler$VexRMIOp of org.graalvm.compiler.asm.amd64.AMD64Assembler
  public final AVXSize = org.graalvm.compiler.asm.amd64.AVXKind$AVXSize of org.graalvm.compiler.asm.amd64.AVXKind
  public abstract Def = org.graalvm.compiler.lir.LIRInstruction$Def of org.graalvm.compiler.lir.LIRInstruction
  public final OperandFlag = org.graalvm.compiler.lir.LIRInstruction$OperandFlag of org.graalvm.compiler.lir.LIRInstruction
  public abstract Use = org.graalvm.compiler.lir.LIRInstruction$Use of org.graalvm.compiler.lir.LIRInstruction
  public ShuffleWordOp = org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle$ShuffleWordOp of org.graalvm.compiler.lir.amd64.vector.AMD64VectorShuffle